Bit line structure with bit line pass over configuration

Static information storage and retrieval – Interconnection arrangements

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365 51, 365 72, G11C 506

Patent

active

056255853

ABSTRACT:
A bit line structure is disclosed. Which includes: sense amplifiers each connected to two pairs of bit lines BL and /BL through bit line selecting switches, to the bit line a plurality of cells are connected, includes: a first bit line pair BL and /BL and a second bit line pair BL and /BL formed by dividing a bit line disposed within a same column respectively in a cell array; a first connecting bit line for connecting the bit line BL of said second bit line pair to said sense amplifier; a second connecting bit line for connecting the bit line /BL of said second bit line pair to said sense amplifier; said second connecting bit line having two crossing sections 25 crossing with another second connecting bit line for connecting a bit line BL of a second bit line belonging to an adjacent sense amplifier; and bit line selecting switches for connecting said first bit line pair and said second bit line pair respectively to said sense amplifier, whereby a number of memory cells connected to each bit line is reduced to 1/2 compared with the conventional technique, the bit lines are arranged 3-dimensionally to eliminate the area loss in carrying out the layout, and particularly, the connecting bit lines are made of a conductive material which has a smaller resistance than a conductive material of the bit lines.

REFERENCES:
patent: 5060189 (1991-10-01), Ota
patent: 5107459 (1992-04-01), Chu et al.
patent: 5272665 (1993-12-01), Vesugi
patent: 5396450 (1995-03-01), Takashima et al.
patent: 5457648 (1995-10-01), Eisig
patent: 5499205 (1996-03-01), Ahn et al.
"Twisted Bit-line Architectures for Multi-megabit DRAM's", Hideto Hidaka et al., IEEE Journal of Solid-State Circuits, vol. 24, No. 1, Feb. 1989.

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