Bit line structure of dynamic type semiconductor memory device

Details Bit line structure of dynamic type semiconductor memory device Bit line structure of dynamic type semiconductor memory device

1988-01-29

1990-05-01

Gossage, Glenn A.

Static information storage and retrieval

Interconnection arrangements

365 51, 365190, G11C 506

Patent

active

049224530

ABSTRACT:
A semiconductor memory device of a folded bit line structure comprises a plurality of bit line pairs in which each bit line pair is divided into a plurality of blocks along a longitudinal direction, and each divided bit line pair is formed by an interconnection layer at a level above a substrate different from the level of an adjacent divided bit line pair in the same block and different from the level of the same bit line pair in an adjacent block.

REFERENCES:
patent: 4156938 (1979-05-01), Proebsting et al.
patent: 4570241 (1986-02-01), Arzubi
patent: 4586171 (1986-04-01), Fujishima
patent: 4692900 (1987-09-01), Ooami et al.
Arzubi, "Folded Bit Line Connection to Sense Latch", IBM Technical Disclosure Bulletin, vol. 24, No. 9, Feb. 1982, pp. 4800-4801.
Arzubi et al, "One-Device Memory Cell Arrangement with Improved Sense Signals", IBM Technical Disclosure Bulletin, vol. 23, No. 6, Nov. 1980, pp. 2331-2332.

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