Bit line structure for semiconductor memory device including cro

Details Bit line structure for semiconductor memory device including cro Bit line structure for semiconductor memory device including cro

1992-04-28

1993-05-25

Gossage, Glenn

Static information storage and retrieval

Interconnection arrangements

365190, 365210, 365206, 365 51, G11C 506, G11C 11407

Patent

active

052146014

ABSTRACT:
A semiconductor memory device of folded bit line structure includes a cross portion in at least one portion of each bit line pair so that values of coupling capacitance with adjacent bit line pairs are equal to each other with respect to the paired bit lines. Preferably, the respective bit line pairs are equally divided into 4N (N being an integer), although advantages of the invention may be obtained with division of the bit lines into 3N, and the cross parts are provided at dividing points so that bit line pairs having the cross parts at the same dividing points are arranged on alternate pairs of bit lines. In a preferred embodiment, the cross parts are provided in regions for forming restore circuits or sense amplifiers. In a further embodiment, a dummy word line for selecting dummy cells for providing a reference potential is selected according to the position of a selected word line.

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patent: 4757476 (1988-07-01), Fujishima et al.
patent: 4922459 (1990-05-01), Hidaka
patent: 4980860 (1990-12-01), Houston et al.
IBM J. Res. Develop.: "VLSI Wiring Capacitance", by Peter E. Cottrell et al., vol. 29, No. 3, May, 1985, pp. 277-288.

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