Bit line sense amplifier

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S051000, C327S057000

Reexamination Certificate

active

06225834

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bit line sense amplifier for a semiconductor memory device, and in particular to a bit line sense amplifier which can increase a data sensing speed and improve an operational speed of a chip by using a current sensing method in data-sensing a bit line having a large capacitive load.
2. Description of the Background Art
FIG. 1
illustrates a conventional bit line sense amplifier. As shown therein, the conventional bit line sense amplifier is a cross-coupled latch type bit line sense amplifier which senses a data according to a charge sensing method, and amplifies and outputs the data.
According to the charge sensing method, in case charge sharing takes place according to a charge conservation law in regard to charges stored in a data storage capacitor of a memory cell selected by bit lines BL, /BL having a half VCC voltage (approximately ½ VCC) level due to equalization and precharge, a small voltage difference (at most, a few hundreds mv) is generated between the bit line pair BL, /BL.
Thereafter, the bit line sense amplifier senses the voltage difference, controls and amplifies the sensed voltage difference according to sense amp driving signals RTO, /SE, and outputs it to a data bus line. At the same time, the bit line sense amplifier writes back the same data in the data storage capacitor of the selected memory cell.
In the charge sensing method, a great capacitive load is applied to a sense amp line and the bit lines BL, /BL during a sensing operation, and thus a delay is often generated when the small voltage difference is amplified and outputted to an output terminal.
This phenomenon increases an access time in a high-speed memory device, thereby reducing an output speed of the data.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a bit line sense amplifier which can be operated at a high speed by generating, rapidly sensing and amplifying a large current during a sensing operation according to a current sensing method.
In order to achieve the above-described object of the present invention, in a cross-coupled latch type data sense amplifier, a bit line sense amplifier includes: a first switch unit operated according to a sense amp enable signal, and interrupting a capacitive load of one-side bit line from a sense amp one-side output terminal in a sensing operation; a first charging current generating unit turned on by a precharge voltage of the one-side bit line, and rapidly outputting a charging current generated from the sense amp enable signal to the sense amp one-side output terminal; a second switch unit operated according to the sense amp enable signal, and interrupting a capacitive load of the other-side bit line from a sense amp other-side output terminal in the sensing operation; a second charging current generating unit turned on by a precharge voltage of the other-side bit line, and rapidly outputting the charging current generated from the sense amp enable signal to the sense amp other-side output terminal; a first output potential control unit and a second output potential control unit connected between an output terminal of the charging current generating unit and an input terminal of a sense amp control signal, and rapidly converting a potential of the sense amp output terminal to a ground voltage level in the sensing operation; a capacitor connected between the one-side output terminal of the sense amplifier and the ground, and charging the charging current; and a cross-coupled latch unit connected between the output terminal of the charging current generating unit and the input terminal of the sense amp control signal, and rapidly converting the potential of the sense amp output terminal to a power voltage level.


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patent: 5923202 (1999-07-01), Merrill
patent: 5942919 (1999-08-01), Ang et al.

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