Static information storage and retrieval – Interconnection arrangements
Patent
1999-04-01
2000-12-19
Le, Vu A.
Static information storage and retrieval
Interconnection arrangements
365 51, 365 69, G11C 506
Patent
active
061634751
ABSTRACT:
A novel crossover arrangement reduces the area of a memory array by using only one crossover structure within each array block. Yet the total differential signal degradation for each respective true and complement bit line pair arising from coupling between the respective true bit line and the respective complement bit line as well as differential coupling to the respective true and complement bit lines from unrelated adjacent true or complement bit lines, is no worse than that resulting from a true bit line being adjacent to its complement bit line for their entire length. For one embodiment of the invention, each complementary pair of bit lines runs vertically within an array block from the top to the bottom of the array block. The true bit line and complement bit line of a first pair run adjacent to each other from the top to the bottom of the array block without any crossovers. The true bit line and complement bit line of a second pair do not run adjacent to each other, but instead straddle the first pair (i.e., both true and complement bit lines of the first pair lie between the true and complement bit lines of the second pair), with a single crossover half-way down the second bit line pair (vertically in the middle of the array block). This crossover arrangement repeats horizontally throughout each array block in groups of two pairs of bit lines (four physical bit line wires). By using this crossover arrangement, if guard cells are used only four groups of guard cells are needed in each array block-one each at the top and bottom of the array block, and one each at the top and bottom of the single crossover structure located preferably at the vertical center of the array block.
REFERENCES:
patent: 5420816 (1995-05-01), Ogihara et al.
patent: 5475643 (1995-12-01), Ohta
patent: 5547405 (1996-08-01), Pinney et al.
patent: 5581126 (1996-12-01), Moench
patent: 5679027 (1997-10-01), Smith
patent: 5886919 (1999-03-01), Morikawa et al.
LandOfFree
Bit line cross-over layout arrangement does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bit line cross-over layout arrangement, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit line cross-over layout arrangement will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-275864