Bit line coupling

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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Reexamination Certificate

active

07551466

ABSTRACT:
The invention provides methods and apparatus. Alternate bit-line pairs of a memory device are concurrently selected. Each bit-line pair has one bit line formed at a first vertical level and one adjacent bit line formed at a second vertical level different than the first vertical level.

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patent: 2004/0208037 (2004-10-01), Winograd et al.
U.S. Appl. No. 11/405,762, filed Apr. 18, 2006, Goda, Akira et al.

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