Bit line control circuit for a content addressable memory

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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C365S154000

Reexamination Certificate

active

06906937

ABSTRACT:
A bit line control circuit is coupled between a bit line of an associated Content Addressable Memory (CAM). Array and a supply voltage. The bit line control circuit adjusts the charge current for the bit line in response to a bit line control signal. For some embodiments, the bit line control circuit includes a dynamic component and a static component to control the bit line.

REFERENCES:
patent: 5966319 (1999-10-01), Sato
patent: 6075729 (2000-06-01), Ohhata et al.
patent: 6256241 (2001-07-01), Mehalel
patent: 6785179 (2004-08-01), Bull et al.

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