Bit line arrangement for integrated circuits

Details Bit line arrangement for integrated circuits Bit line arrangement for integrated circuits

1992-12-02

1994-05-24

LaRoche, Eugene R.

Static information storage and retrieval

Interconnection arrangements

Transistors or diodes

365 63, G11C 506

Patent

active

053155424

ABSTRACT:
The arrangement relates to bit lines which are widened to form contact surfaces (11, 21, 31, 41, 51) at the contacts (10, 20, 30, 40, 50) to underlying cells, the contacts being arranged in an at least a three-fold stagger. A minimum space requirement is achieved in conjunction with increased reliability when the distance b.sub.Sp between edges of adjacent bit lines has the same value everywhere, and the contact surfaces can thereby be enlarged.

REFERENCES:
patent: 5021998 (1991-06-01), Suzuki
patent: 5107459 (1992-04-01), Chu

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