Bit field manipulation

Data processing: database and file management or data structures – Database design – Data structure types

Reexamination Certificate

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Details

C707S793000, C707S793000, C709S228000

Reexamination Certificate

active

07013302

ABSTRACT:
A bit field direct manipulation device which processes data packets using a multi-threaded pipelined machine, wherein no instruction depends on a preceding instruction because each instruction in the pipeline is executed for a different thread. The multi-thread packet processor transfers a data packet from a flexible data input buffer to a packet task manager, dispatches the data packet from the packet task manager to a multi-threaded pipelined analysis machine, classifies the data packet in the analysis machine, modifies and forwards the data packet in a packet manipulator. The multi-thread packet processor includes an analysis machine having multiple pipelines, wherein one pipeline is dedicated to directly manipulating individual data bits of a bit field, a packet task manager, a packet manipulator, a global access bus including a master request bus and a slave request bus separated from each other and pipelined, an external memory engine, and a hash engine.

REFERENCES:
patent: 6157955 (2000-12-01), Narad et al.
patent: 6157996 (2000-12-01), Christie et al.
patent: 2002/0174318 (2002-11-01), Stuttard et al.
patent: 2003/0035430 (2003-02-01), Islam et al.
patent: 2003/0088610 (2003-05-01), Kohn et al.
patent: 2004/0049663 (2004-03-01), Hansen et al.

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