Bit-field logic operation unit

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3642597, 3642598, 364DIG1, G06F 700

Patent

active

054578035

ABSTRACT:
A bit field logic operation unit which performs a logic operation accompanied by a masking operation comprises a logic operation part, a mask pattern generation part, and a bit map operation part. All parts are constituted by dynamic circuit constructions where the processes are performed in a preset period and an active period. The preset periods of the logic operation part and the mask pattern generation part are carried out simultaneously, and the active periods of the logic operation part and the mask pattern generation part and the preset period of the bit map operation part are carried out simultaneously.

REFERENCES:
patent: 4400794 (1983-08-01), Koos
patent: 4945472 (1990-07-01), Sakamura
Digital Processes, vol. 4, No. 2, 1978, St.-Saphorin CH, pp. 67-81; D. Gajski et al: "High-Speed Masking Rotator", p. 69, line 8--15; Figure 2, Table 1.

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