Bit error rate tester and pseudo random bit sequences...

Details Bit error rate tester and pseudo random bit sequences... Bit error rate tester and pseudo random bit sequences...

2005-03-09

2009-02-03

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Testing

C714S724000, C714S739000

Reexamination Certificate

active

07486725

ABSTRACT:
A bit error rate tester and a pseudo random bit sequences (PRBS) generator thereof are provided. The bit error rate tester includes a transmitter PRBS generator, a master PRBS generator, a slave PRBS generator, a comparator, and a counting unit. The transmitter PRBS generator generates a parallel N-bit (N is an integer larger than 1) original PRBS, wherein an object to be tested receives the original PRBS and outputs a parallel N-bit code to be tested. The master and the slave PRBS generators generate a master and a slave parallel N-bit PRBS, respectively. The comparator receives, compares, and determines whether the code to be tested, the master and the slave PRBS are the same or not, and outputs a comparison result. The counting unit coupling to the comparator counts a number of bit errors based on the comparison result.

REFERENCES:
patent: 5825824 (1998-10-01), Lee et al.
patent: 6597735 (2003-07-01), Baba
patent: 7305025 (2007-12-01), Yamaguchi et al.
patent: 2004/0153913 (2004-08-01), Fishman et al.
patent: 2005/0071399 (2005-03-01), Bonaccio et al.
Malasani, Rammohan. “A SiGe 10-Gb/s Multi-Pattern Bit Error Rate Tester,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 321-324, Jun. 2003.

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