Bit clock regenerating circuit and data regenerating method

Details Bit clock regenerating circuit and data regenerating method Bit clock regenerating circuit and data regenerating method

1992-09-24

1995-03-07

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Phase shift by less than period of input

377 26, 327100, 327165, H03L 706

Patent

active

053961099

ABSTRACT:
A bit clock regenerating circuit comprising an edge detector made up of two flip-flops for detecting edges of a binary signal and a gating circuit, a counter receiving an edge detected pulse from the edge detector as a load signal for setting an initial value, counting clock pulses with a given frequency, and generating a bit clock according to the result of the counting, and a ROM in which multiple conversion tables are formed to supply an initial value for the counter according to an output value of the counter, and a conversion table for determining regeneration conditions is selected according to a switching signal.

REFERENCES:
patent: 4385395 (1983-05-01), Tanaka et al.
patent: 4389643 (1983-06-01), Hill
patent: 4535306 (1985-08-01), Yamaguchi et al.
patent: 4594547 (1986-06-01), Halder
patent: 4656528 (1987-04-01), Shichijo et al.
patent: 5005141 (1991-04-01), Sanada et al.

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