Bit by bit APDE verify for flash memory applications

Details Bit by bit APDE verify for flash memory applications Bit by bit APDE verify for flash memory applications

1999-10-05

2000-09-19

Phan, Trong

Static information storage and retrieval

Floating gate

Particular biasing

G11C 1134

Patent

active

061221988

ABSTRACT:
A method of erase verifying and overerase verifying an array of flash memory cells by erase verifying each memory cell bit-by-bit in a memory array, overerase verifying each memory cell bit-by-bit in the memory array after each memory cell verifies as erased and again erase verifying each memory cell bit-by-bit in the memory array after each cell overerase verifies. The threshold voltage of each memory cell is compared to the threshold voltage of a reference memory cell and an overerase correction pulse is applied to the column in which the overerased memory cell is located.

REFERENCES:
patent: 5237535 (1993-08-01), Mielke et al.
patent: 5642311 (1997-06-01), Cleveland et al.
patent: 5732019 (1998-03-01), Urai
patent: 5901090 (1999-05-01), Haddad et al.

Affiliated with

Also associated with

Rating

Bit by bit APDE verify for flash memory applications does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bit by bit APDE verify for flash memory applications, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bit by bit APDE verify for flash memory applications will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1079949