Bit agitator

Details Bit agitator Bit agitator

1997-01-14

1998-10-20

Tarcza, Thomas H.

Cryptography

Particular algorithmic function encoding

Nbs/des algorithm

380 23, H04L 900

Patent

active

058258850

ABSTRACT:
A 6-digit decimal input value A and a previously prepared 6-digit decimal extension fixed value L are substituted in an extension function f, thereby extending the input value A to a 12-digit decimal value f(A,L). This extended value f(A,L) is bit-agitated with a bit agitation key R. Further, a value C obtained by the bit agitation processing is substituted in a reduction function g, thereby obtaining a 6-digit decimal output value B. Thus, the input value A is extended by the extension processing to be thereafter subjected to the bit agitation processing, whereby safety of secret information can be improved without increasing the number of digits of the input value A. Further, the value obtained by the bit agitation is thereafter reduced, whereby the output value B can be reduced to a number of digits which is applicable to the human memory. Thus, a bit agitator is obtained which is safer than a conventional one and has an excellent user interface.

REFERENCES:
patent: 4694412 (1987-09-01), Domenik et al.
patent: 5323465 (1994-06-01), Avarne
patent: 5345506 (1994-09-01), Tsubakiyama et al.
patent: 5544245 (1996-08-01), Tsubakiyama
patent: 5546463 (1996-08-01), Caputo et al.
"Fast Data Encoding Algorithm FEAL", Technical Report by Institute of Electronics and Communicating Engineers of Japan (Information Theory), vol. 80, No. 113, IT86-33, pp. 1 to 6, 1986.

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