Bistable sequential logic network that is sensitive to the edges

Details Bistable sequential logic network that is sensitive to the edges Bistable sequential logic network that is sensitive to the edges

1995-05-31

1997-04-29

Westin, Edward P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327198, 327202, 326 46, H03K 3289, H03K 3037

Patent

active

056253095

ABSTRACT:
A bistable logic network of the sequential type, responsive to the edges of input signals, comprising first and second input SR flip-flops which are connected to an output SR flip-flop through two transfer and block logic gates.
Each of said logic gates has two input terminals connected to the output terminal and to one input terminal of an input flip-flop.
The output terminals of the output flip-flop are feedback connected to the other input terminals of the two input flip-flops.

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Carr, Dr. William N. and Dr. Jack P. Mize MOS/LSI Design and Application, McGraw-Hill Book Company, New York, 1972, pp. 107-145.
MacFarlane, Ian P., "Pulse Generator and Flip-Flops", IEEE Transactions on Instrumentation and Measurement, vol. IM-21, No. 2, May 1972, pp. 148-153.
Carr, Dr. William N. and Mize, Dr. Jack P., "MOS/LSI Design and Application", McGraw-Hill Book Company, 1972, pp. 138-141.
Mano, Morris M. Computer Engineering: Hardward Design. Prentice Hall: New Jersey, 1988. pp. 122-124.

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