Active solid-state devices (e.g. – transistors – solid-state diode – Tunneling pn junction device – In three or more terminal device
Patent
1995-02-02
1996-05-07
Nguyen, Viet Q.
Active solid-state devices (e.g., transistors, solid-state diode
Tunneling pn junction device
In three or more terminal device
365159, 365174, 257106, 257107, 257104, 257124, H01L 2974
Patent
active
055148824
ABSTRACT:
A new static memory cell based on the bistable operation of a three-terminal four layer semiconductor device working in the forward blocking state is disclosed. The power consumption of the memory cell is low. The switching speed of the memory cell is in the nanosecond range. The memory cell may be integrated into VLSI processes and is of a size suitable for VLSI applications. The memory cell comprises a semiconductor device which comprises: an n-type semiconductor cathode region; a p-type semiconductor gate region; a third semiconductor region adjacent the gate region; a fourth region adjacent the third semiconductor region; and a hole-injecting boundary between the third semiconductor region and the fourth region. The semiconductor device is preferably a p-n-p-n device. The gate current-voltage characteristics of the device comprise a negative resistance region. The device is designed to operate in a forward blocking low current state. The memory cell further comprises a gate load element and a power supply for biasing the device. When the device is properly biased and is connected to a suitable gate load element it can operate in one of two bistable states characterized by different gate-cathode voltages. The state of the device can be switched by applying suitable pulses to the gate.
REFERENCES:
patent: 3638203 (1972-01-01), Patel
patent: 5132767 (1992-06-01), Ogura et al.
patent: 5412598 (1995-05-01), Shulman
Nguyen Viet Q.
The University of British Columbia
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