BISC with interconnected register ring and selectively operating

Details BISC with interconnected register ring and selectively operating BISC with interconnected register ring and selectively operating

1988-07-28

1992-01-21

Lee, Thomas C.

Boots, shoes, and leggings

364231, 3642328, 364247, 364258, 364DIG1, G06F 934

Patent

active

050832638

ABSTRACT:
An integer processing unit for a reduced instruction set computer having a plurality of registers arranged in groups referred to as register windows, each window register group including a number of input registers, a similar number of output registers, and a number of local registers, the register window groups being physically arranged so the input registers of each group are the same physical register as the output registers of the next adjacent register window group thereby forming one large interconnected ring of register window groups, an arrangement for designating the register window group presently active, and an arrangement for designating register window groups which are not available for use.

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