Bipolar transistor with geometry optimized for device...

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Plural non-isolated transistor structures in same structure

Reexamination Certificate

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C257S566000, C257S578000, C257S583000, C257S591000, C257S592000

Reexamination Certificate

active

10885250

ABSTRACT:
The present invention is generally directed to bipolar transistors with geometry optimized for device performance and various methods of making same. In one illustrative embodiment, the device includes a substrate, an intrinsic base region formed in the substrate, a continuous emitter region formed within the intrinsic base region, the emitter region having a plurality of substantially hexagonal shaped openings defined therein, and a plurality of extrinsic base regions formed in the substrate, wherein each of the extrinsic base regions is positioned within an area defined by one of the plurality of substantially hexagonal shaped openings.

REFERENCES:
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patent: 5008725 (1991-04-01), Lidow et al.
patent: 5130767 (1992-07-01), Lidow et al.
patent: 6278140 (2001-08-01), Harada et al.
patent: 2001/0026429 (2001-10-01), Fukuda et al.
patent: 2002/0096713 (2002-07-01), Magnee et al.
patent: 2004/0023463 (2004-02-01), Shirakawa
Dutta et al., “Influence of Device Geometry on DC, AC and SOA of High Speed HV Bipolar Transistors”.

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