Bipolar transistor with an improved collector structure

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor

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Details

257198, 257593, 257592, H01L 31072, H01L 31109, H01L 27082, H01L 27102

Patent

active

053369092

ABSTRACT:
In a very high speed bipolar transistor, an n.sup.+ -type GaAs collector layer and an n-type GaAs collector layer are stacked in an intrinsic transistor region, and an i-type GaAs collector layer is formed around the n.sup.+ -type GaAs collector layer and the n-type GaAs collector layer. An n-type GaAs collector layer is formed on the n.sup.+ -type GaAs collector layer such that a part of the n-type GaAs collector layer extends on the i-type GaAs collector layer. A p-type GaAs external base layer is formed outside the n-type GaAs collector layer. A p.sup.+ -type Al.sub.x Ga.sub.l-x As base layer is formed on the n-type GaAs collector layer. An emitter layer is formed such that it is arranged only in the intrinsic transistor region on the p.sup.+ -type Al.sub.x Ga.sub.l-x As base layer and constitutes a heterojunction together with the base layer. Design trade-off between the cutoff frequency and maximum oscillation frequency of the transistor is eliminated.

REFERENCES:
patent: 3607468 (1971-09-01), Chang et al.
patent: 3709746 (1973-01-01), De Witt
patent: 4644383 (1987-02-01), Akcasu
patent: 4933732 (1990-06-01), Katoh et al.

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