Bipolar transistor structure with self-aligned device and isolat

Details Bipolar transistor structure with self-aligned device and isolat Bipolar transistor structure with self-aligned device and isolat

1987-04-13

1988-04-19

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437203, 437200, 437192, 437225, 437105, 437106, 357 34, 357 71, 148DIG11, H01L 21203, H01L 21283

Patent

active

047386240

ABSTRACT:
A process for fabricating a bipolar transistor structure having device and isolation regions fully self-aligned. The transistor is fabricated using a process wherein collector base and emitter layers are sequentially formed on a semiconductor substrate by a molecular beam epitaxy technique. The emitter layer is covered by insulation layers and a photoresist layer is then formed on the insulation layer. The photoresist layer is masked, exposed and developed to provide a pattern which is used as an etch mask to form both the device emitter area and isolation areas. The isolation areas, the emitter region and the base and collector regions are therefore formed.

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IBM Technical Disclosure Bulletin, vol. 27, No. 2, Jul. 1984, J. F. Shepard "Self-Aligned Bipolar Transistor" p. 1008.

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