Bipolar transistor process using sidewall spacer for aligning ba

Details Bipolar transistor process using sidewall spacer for aligning ba Bipolar transistor process using sidewall spacer for aligning ba

1988-01-26

1989-08-15

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 31, 437228, 437233, 437200, 437162, 148DIG10, 148DIG11, H01L 21265

Patent

active

048574767

ABSTRACT:
An improved method for fabricating a bipolar transistor reduces base current resistance which heretofore has limited the switching frequency and current handling ability of bipolar transistors. The transistor base and emitter are formed as a diffusion through an emitter contact pedestal formed on an epitaxial layer over a substrate. Access to the n-type emitter is through the emitter contact pedestal while access to the lightly doped p-type base is through a nearby heavily doped p-type base insert. Electrical isolation between the pedestal and the base insert is ensured by forming oxide sidewall spacers on the emitter contact pedestal during the implant used to form the base insert. Defining the isolation with sidewall spacers permits reliable isolation of emitter and base insert while minimizing their physical separation. The minimized physical separation provides a base current path with considerably less total resistance than is found in the background art in which the isolation is defined photo-lithographically.

REFERENCES:
patent: 4398962 (1983-08-01), Kanazawa
patent: 4418469 (1983-12-01), Fujita
patent: 4662062 (1987-05-01), Toyooka
patent: 4682409 (1987-07-01), Thomas
patent: 4705599 (1987-11-01), Suda
patent: 4745080 (1988-05-01), Scovell
patent: 4749661 (1988-06-01), Bower
patent: 4778774 (1988-10-01), Blossfeld
patent: 4784971 (1988-11-01), Chiu
Dockerty, R., IBM TDB vol. 25, No. 11B, Apr. 1983, pp. 6150-6151.

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