Patent
1987-09-23
1990-08-14
Wojciechowicz, Edward J.
357 34, 357 41, 357 43, 357 50, 357 55, 357 68, H01L 2712
Patent
active
049491512
ABSTRACT:
A high integration bipolar transistor operable at very high operating speed is disclosed. A semiconductor device of this invention has a semiconductor substrate of a first conductivity type, a buried impurity region formed on the substrate, and a bipolar transistor formed on the buried impurity region, wherein a plurality of monocrystalline active regions defined by the buried impurity region are isolated from each other by an element isolation insulator, the buried impurity region is connected to a graft region formed on the element isolation insulator at least at the side wall of the buried impurity region, and connected to a semiconductor element in a different active region via the graft region.
REFERENCES:
patent: 4751558 (1988-06-01), Kenney
patent: 4812894 (1989-03-01), Nakamura et al.
patent: 4819054 (1989-04-01), Kawaji et al.
Horiuchi Masatada
Nakamura Tohru
Washio Katsuyoshi
Hitachi , Ltd.
Wojciechowicz Edward J.
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