Bipolar transistor having isolation regions

Details Bipolar transistor having isolation regions Bipolar transistor having isolation regions

2000-03-29

2000-12-05

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438425, 438426, 438430, 438432, H01L 2176

Patent

active

061566225

ABSTRACT:
In an NPN transistor of this invention having a trench isolation structure, for example, an N.sup.+ -type buried layer and an N.sup.- -type epitaxial layer are stacked on an element forming region of a P.sup.+ -type substrate, and a trench having polysilicon filled therein is formed in a portion adjacent to the element forming region. Further, a field oxide film is formed to extend from the trench having polysilicon filled therein over to the adjacent element isolation region without extending into the element forming region. Thus, a distance from the front end portion of the field oxide film on the element forming region side to the trench is reduced to reduce the element area. Therefore, the parasitic capacitance can be reduced and the power consumption of a circuit can be reduced.

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