Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1997-11-17
2000-05-16
Chaudhuri, Olik
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257526, 257517, 257520, 257565, H01L 2900
Patent
active
060641061
ABSTRACT:
In an NPN transistor of this invention having a trench isolation structure, for example, an N.sup.+ -type buried layer and an N.sup.- -type epitaxial layer are stacked on an element forming region of a P.sup.+ -type substrate, and a trench having polysilicon filled therein is formed in a portion adjacent to the element forming region. Further, a field oxide film is formed to extend from the trench having polysilicon filled therein over to the adjacent element isolation region without extending into the element forming region. Thus, a distance from the front end portion of the field oxide film on the element forming region side to the trench is reduced to reduce the element area. Therefore, the parasitic capacitance can be reduced and the power consumption of a circuit can be reduced.
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Shishido Norihiko
Yoshino Sanae
Cao Phat X.
Chaudhuri Olik
Kabushiki Kaisha Toshiba
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