Fishing – trapping – and vermin destroying
Patent
1986-09-08
1987-12-15
Ozaki, George T.
Fishing, trapping, and vermin destroying
437178, 437228, H01L 21425, H01L 21441
Patent
active
047133554
ABSTRACT:
A bipolar transistor structure and process for its manufacture. The structure includes an emitter region formed over a base region, and a thin wall of insulating material, such as a thermal oxide, along the edge of the emitter region. The wall of insulating material electrically isolates emitter and base contact areas, and greatly reduces the size of inactive portions of the base region, thereby reducing the base resistance and base-collector capacitance, an increasing the speed of operation of the transistor. The wall of insulating material is formed by a process that eliminates at least one photolithographic patterning and etching operation found in conventional processes. In a preferred embodiment of the invention, the emitter region is shaped to include a wide inactive region and an active region of which a portion has reduced width. This configuration provides for lower emitter resistance, but maintains a relatively long active emitter perimeter, which keeps the base resistance also low.
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Osburn, C. M., Tsai, M. Y. and Zirinsky, S., "Self-Aligned Silicide Conductors in FET Integrated Circuits," IBM Technical Disclosure Bulletin, vol. 24, No. 4, Sep. 1981.
Heal Noel F.
Ozaki George T.
Stern Robert J.
TRW Inc.
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