Bipolar transistor and methods of forming bipolar transistors

Details Bipolar transistor and methods of forming bipolar transistors Bipolar transistor and methods of forming bipolar transistors

2002-04-01

2003-07-15

Nguyen, Tuan H. (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Bipolar transistor structure

C257S588000, C257S592000

Reexamination Certificate

active

06593640

ABSTRACT:

FIELD OF THE INVENTION
The invention generally relates to the formation of semiconductor devices, and more particularly, to the formation of a bipolar transistor in which migration of dopants is reduced.
BACKGROUND OF THE INVENTION
As semiconductor devices have become smaller, the possibility of performance degradation from inter-diffusion between adjacent structures in the semiconductor devices has increased. Accordingly, it would be desirable to design structures that reduce such inter-diffusion, and develop associated manufacturing methods for such structures.
SUMMARY OF THE INVENTION
According to one aspect of the invention provided is a method of reducing lateral diffusion of a dopant in a transistor, comprising the steps of:
forming a first region of semiconductor in or on a semiconductor substrate;
forming a second region of semiconductor in or on the semiconductor substrate, the second region being located generally adjacent to the first region in a direction parallel to a general plane of the semiconductor substrate;
implanting or depositing a dopant diffusion-retarding substance in the first region; and
implanting or depositing the dopant in the first region.
According to one aspect of the invention, the step of implanting or depositing the dopant in the first region comprises the step of:
implanting or depositing the dopant in the first region such that there is a buffer zone, into which the dopant may diffuse, between a region in which the dopant is initially implanted and the second region.
The method may further comprise the step of:
determining a diffusion distance for the buffer zone based on an expected reduced diffusion as a result of the presence in the first region of the dopant diffusion-retarding substance.
According to another aspect of the invention, the first region forms a polysilicon layer and the second region forms a base, and the method further comprises the steps of:
forming a third region of semiconductor material for use as an emitter;
forming a layer of photoresist on the third region of semiconductor material;
patterning the layer of photoresist; and
removing part of the third region as defined by the patterned layer of photoresist to define an emitter, wherein the step of implanting or depositing the dopant comprises:
implanting or depositing the dopant using the patterned layer of photoresist as a mask.
In one embodiment, the patterned layer of photoresist extends partially over the first region to define a buffer zone into which the dopant may diffuse after implantation or deposition.
The dopant diffusion-retarding substance may be a group IV element, for example carbon or germanium.
According to another aspect of the invention, provided is a bipolar transistor comprising:
a first polysilicon region formed in or on a semiconductor substrate,
a second base region formed in or on the semiconductor substrate, the second polysilicon region being located generally adjacent to the first base region in a direction parallel to a general plane of the semiconductor substrate, the;
the first polysilicon region including therein a dopant and a dopant diffusion-retarding substance.
In one embodiment of the transistor, there is a buffer zone into which the dopant may diffuse, the buffer zone being between a region in which the dopant is initially implanted and the second base region.
In such a case, preferably a diffusion distance for the buffer zone is based on an expected reduced diffusion as a result of the presence in the first polysilicon region of the dopant diffusion-retarding substance.
The transistor may further comprise:
a third emitter region formed of semiconductor material, wherein the buffer zone is defined by an overlap between the third emitter region and the first polysilicon region.
The dopant diffusion-retarding substance may be a group IV element, for example carbon or germanium.
According to a further aspect of the invention provided is a bipolar transistor comprising:
a base region,
an extrinsic base region being located generally adjacent to the base region,
the extrinsic base region having implanted therein a dopant and a dopant diffusion-retarding substance, the dopant and dopant diffusion-retarding substance being implanted such that there is a buffer zone in the extrinsic base region immediately adjacent to the base region into which the dopant may diffuse after implantation.
Preferably, the buffer region is defined by an overhang of an emitter region over the base region.


REFERENCES:
patent: 5930635 (1999-07-01), Bashir et al.
patent: 6248650 (2001-06-01), Johnson
patent: 6426265 (2002-07-01), Chu et al.
patent: 2002/0061627 (2002-05-01), Kovacic
patent: 2002/0076893 (2002-06-01), Howard et al.

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