Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With enlarged emitter area
Reexamination Certificate
2006-02-28
2006-02-28
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With enlarged emitter area
C257S587000, C257S584000, C257S586000, C438S348000
Reexamination Certificate
active
07005723
ABSTRACT:
In a method of producing a bipolar transistor, a semiconductor substrate having a substrate surface is provided. A base-terminal layer for providing a base terminal is formed on the substrate surface, and an emitter window having a wall area is formed in the base-terminal layer. A first spacing layer is formed on the wall area of the emitter contact window, and a recess is etched into the substrate within a window specified by the first spacing layer. A base layer contacted by outdiffusion from the base-terminal layer is formed in the recess of the emitter window, and a second spacing layer is formed on the first spacing layer and on the base layer. The second spacing layer is structured for the purpose of specifying a planar terminal pad on the base layer, and an emitter layer is formed on the planar terminal pad.
REFERENCES:
patent: 5523245 (1996-06-01), Imai
patent: 6319786 (2001-11-01), Gris
patent: WO 01/63644 (2001-08-01), None
Schupke Kristin
Tilke Armin
Flynn Nathan J.
Infineon - Technologies AG
Maginot Moore & Beck
Wilson Scott R.
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