Bipolar transistor and method of forming BiCMOS circuitry

Details Bipolar transistor and method of forming BiCMOS circuitry Bipolar transistor and method of forming BiCMOS circuitry

1998-08-14

1999-03-30

Niebling, John F.

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

438314, 438353, H01L 21331, H01L 218222

Patent

active

058888748

ABSTRACT:
A method of forming BiCMOS circuitry includes, i) conducting a first common second conductivity type implant into, a) a first substrate area to comprise a second conductivity type well for a first area first conductivity type FET, and b) a third substrate area to comprise one of a bipolar transistor second conductivity type collector or emitter region; ii) providing field oxide regions and active area regions within first, second and third areas of the substrate; iii) conducting a first common first conductivity type implant into, a) the second substrate area to comprise a first conductivity type channel stop region beneath field oxide in the second area, and b) the third substrate area to comprise the bipolar transistor base; and iv) conducting a second common second conductivity type implant into, a) at least one of the first or the second substrate areas to comprise at least one of a source/drain implant or a graded junction implant for at least one of the first or second conductivity type FETs, and b) the third substrate area to comprise the other of the second conductivity type collector or emitter regions. A bipolar transistor includes, i) a conductively doped collector region, a conductively doped base region and a conductively doped emitter region; the collector region comprising a doped contact region having a higher dopant concentration than a majority of the remaining portion of the collector region; and ii) an isolation gate positioned between the emitter region and the collector contact region.

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