Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Forming inverted transistor structure
Reexamination Certificate
2011-05-10
2011-05-10
Warren, Matthew E (Department: 2815)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Forming inverted transistor structure
C438S202000, C438S311000, C438S315000, C438S355000
Reexamination Certificate
active
07939417
ABSTRACT:
A structure is disclosed including a substrate including an insulator layer on a bulk layer, and a bipolar transistor in a first region of the substrate, the bipolar transistor including at least a portion of an emitter region in the insulator layer. Another disclosed structure includes an inverted bipolar transistor in a first region of a substrate including an insulator layer on a bulk layer, the inverted bipolar transistor including an emitter region, and a back-gated transistor in a second region of the substrate, wherein a back-gate conductor of the back-gated transistor and at least a portion of the emitter region are in the same layer of material. A method of forming the structures including a bipolar transistor and back-gated transistor together is also disclosed.
REFERENCES:
patent: 3952325 (1976-04-01), Beale et al.
patent: 5352624 (1994-10-01), Miwa et al.
patent: 5736447 (1998-04-01), Choi et al.
patent: 6621108 (2003-09-01), Tashiro et al.
patent: 6636075 (2003-10-01), Nakayama et al.
patent: 7217988 (2007-05-01), Ahlgren et al.
patent: 2004/0036497 (2004-02-01), Nakayama
patent: 2004/0251517 (2004-12-01), Nakashima
patent: 2005/0020023 (2005-01-01), Lachner
U.S. Appl. No. 11/164,071, filed Nov. 9, 2005, Notice of Abandonment dated Sep. 15, 2009.
U.S. Appl. No. 11/164,071, filed Nov. 9, 2005, Notice of Allowance and Fees Due dated May 19, 2009.
U.S. Appl. No. 11/164,071, filed Nov. 9, 2005, Final Office Action dated Apr. 6, 2009.
U.S. Appl. No. 11/164,071, filed Nov. 9, 2005, Office Action dated Oct. 9, 2008.
U.S. Appl. No. 11/164,071, filed Nov. 9, 2005, Final Office Action dated Mar. 27, 2008.
U.S. Appl. No. 11/164,071, filed Nov. 9, 2005, Office Action dated Sep. 25, 2007.
Bryant Andres
Clark, Jr. William F.
Nowak Edward J.
Canale Anthony J.
Hoffman Warnick LLC
International Business Machines - Corporation
Warren Matthew E
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