Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With enlarged emitter area
Reexamination Certificate
2002-07-31
2004-08-03
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With enlarged emitter area
C257S557000, C257S563000, C257S564000, C257S560000, C257S593000
Reexamination Certificate
active
06770953
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bipolar transistor.
2. Description of the Related Art
Bipolar transistors are generally constructed from two pn junctions lying close together in a semiconductor crystal. In this case, either two n-doped regions are separated from one another by a p-doped region (npn transistors) or two p-doped regions by an n-doped region (pnp transistors). The three differently doped regions are referred to as emitter (E), base (B) and collector (C). Bipolar transistors are well known and are used in diverse ways. In the case of bipolar transistors, a distinction is made between “individual” transistors, which are intended for mounting on printed circuit boards and are accommodated in a dedicated housing, and “integrated” transistors, which are fabricated together with further semiconductor components on a common semiconductor carrier, generally referred to as “substrate”.
In addition to the transition frequency of the bipolar transistor, which is one of its limiting frequencies, the base resistance and the base-collector capacitance are critical transistor parameters which determine important characteristic quantities such as the maximum oscillation frequency, the power gain, the minimum noise figure, the gate delay times and the like.
Thus, for example, the following holds true to an approximation:
f
max
=
f
T
8
π
×
R
B
×
C
BC
where f
max
designates the maximum oscillation frequency, f
T
designates the transition frequency, R
B
designates the base resistance and C
BC
designates the base-collector capacitance.
The transition frequency is essentially determined by the dopant profile in the active transistor region. By contrast, the product R
B
*C
BC
can be influenced by the transistor layout (i.e., the geometrical construction).
In the case of previously known bipolar transistors, for example so-called silicon microwave transistors, generally a transistor layout as illustrated diagrammatically in
FIG. 1
is used. Such bipolar transistors have at least one emitter formed from one or more emitter elements, one or more base contact(s) and one or more collector contact(s). In this case, the at least one emitter, the at least one base contact and the at least one collector contact are provided in a specific arrangement with respect to one another for the formation of the transistor layout.
As is illustrated in
FIG. 1
, the emitter (E) can be embodied in strip form, the emitter strip width being given by the minimum possible lithography width. This leads to a smallest possible internal base bulk resistance. In order to minimize the total base resistance, each emitter strip is surrounded by two base connection strips (B). Two emitter strips are usually used, so that only three (instead of four) base strips are required, since the middle base contact can be used for both emitter strips. The collector contacts (C) are embodied beside the outer base contacts.
The transistor layout described can yield the minimum possible resistance for a given minimum lithography width.
The base resistance can be reduced by lengthening the emitter strips, since the base resistance R
B
is proportional to 1/I
&egr;
, where I
&egr;
is equal to the emitter length. It is the case, however, that the base-collector capacitance C
BC
is proportional to the emitter length I
&egr;
, so that the product R
B
*C
BC
is to a first approximation independent of the emitter length I
&egr;
.
In the case of the known bipolar transistors, the total emitter area is chosen in such a way as to produce the current respectively desired in the application of the bipolar transistors.
Such known bipolar transistors can be used for example for the “self-aligned dual polysilicon technology”.
SUMMARY OF THE INVENTION
Taking the known prior art as a departure point, the present invention is based on the object of providing a bipolar transistor which, with regard to its transistor parameters, has an optimized transistor layout in relation to the known solutions.
This object is achieved according to the invention by means of a bipolar transistor, having at least one emitter formed from one or more emitter elements, having one or more base contact(s) and having one or more collector contact(s), the at least one emitter, the at least one base contact and the at least one collector contact being provided in a specific arrangement with respect to one another for the formation of the transistor layout. According to the invention, the bipolar transistor is characterized in that the emitter has at least one closed emitter configuration, in that the at least one emitter configuration bounds at least one emitter inner space, in that two or more base contacts are provided, in that at least one of the base contacts is arranged in the emitter inner space, and in that the at least one other base contact and also the at least one collector contact are arranged outside the emitter configuration.
In this way, it is possible to obtain an optimized transistor construction which, given the same design rules (i.e., the same requirements made of the technology generation), enables a significantly smaller product R
B
*C
BC
than in the case of the transistor layouts customarily used previously, as are illustrated in
FIG. 1
, for example, and described further above. As a result, the properties of the bipolar transistor are improved. In particular, by virtue of the bipolar transistor according to the invention, significantly improved RF (radio frequency) properties of these transistors can be made possible, such as higher transition and maximum oscillation frequencies and a smaller noise figure.
An important difference of the bipolar transistor according to the invention in comparison with the bipolar transistors known in the prior art is that a solution for the minimum base resistance R
B
is not chosen, but rather that the product R
B
*C
BC
is optimized in a targeted manner. Although, as will be explained in greater detail below, this can lead to slightly higher values for R
B
, distinctly lower values are nonetheless achieved for the base-collector capacitance C
BC
.
In contrast to the previously known transistor layout, the inventive emitter is embodied in such a way that it has at least one closed emitter configuration. This means that the emitter has at least one continuous component, this continuous component bounding or surrounding at least one emitter inner space. At least one base contact may be situated within this emitter inner space.
The invention is not restricted to specific configurational forms for the emitter configuration according to the invention. A number of non-exclusive exemplary embodiments are explained in more detail in connection with the description of the figures.
Preferred embodiments of the bipolar transistor according to the invention are described below.
The emitter configuration may advantageously have two or more emitter elements which are connected to one another to form the closed emitter configuration.
To that end, the emitter configuration may, for example, have two or more strip-type emitter elements which are oriented in parallel and spaced apart with respect to one another. Furthermore, the strip-type emitter elements may be connected to one another at their free ends in each case via an emitter element formed as an outer emitter web. If more than two strip-type emitter elements are used for the emitter configuration, the outer emitter web may comprise a corresponding number of individual constituent parts, the totality of which then forms the outer emitter web. In contrast to the known transistor layout, the emitter is now no longer embodied only in strip form, rather the two emitter strips are connected by intermediate webs.
In a further refinement, at least one further, inner emitter web which connects the two strip-type emitter elements may be provided between the two outer emitter webs, via which inner emitter web the emitter inner space is subdivided into two or more partial spaces. In such a refinement, with t
Aufinger Klaus
Boeck Josef
Zeiler Markus
Infineon - Technologies AG
Jackson Jerome
Landau Matthew
Schiff & Hardin LLP
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