Bipolar transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Heterojunction formed between semiconductor materials which...

Reexamination Certificate

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C257S197000, C257S198000, C257S578000, C257S579000

Reexamination Certificate

active

06677625

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a bipolar transistor and a method of fabricating the same, and more particularly, it relates to a bipolar transistor suitably used in mobile communication equipment and a method of fabricating the same.
Recently, a field effect transistor formed from GaAs with small power consumption (MESFET) is widely used as a transistor of a transmitting power amplifier used in mobile communication equipment such as a portable telephone. A negative power source is generally used for bias for a gate electrode of a MESFET. Accordingly, in using a MESFET in a transmitting power amplifier, two power sources, namely, a positive power source and a negative power source, are required. This is a disadvantage to downsizing of the amplifier, and hence, a transistor operated by using a positive power source alone is earnestly desired.
Furthermore, in recent communication systems such as CDMA (code division multi-channel access), an output current of a transmitting power amplifier is required to have small distortion (namely, to be linear). As a transistor meeting these requirements, a heterojunction bipolar transistor (HBT) including the emitter formed from a semiconductor having a larger band gap than a semiconductor forming the base is practically used.
As the materials for an HBT, GaAs and AlGaAs have been generally used for a base layer and an emitter layer, respectively, but InGaP having less surface recombination and higher reliability than AlGaAs is recently used for an emitter layer.
A performance index corresponding to a high operation speed of a bipolar transistor is a maximum oscillation frequency f
max
, which is represented as follows:
f
max
=(
f
t
/(8&pgr;
R
b
C
bc
))
1/2
wherein f
t
indicates a cut-off frequency, R
b
indicates a base resistance and C
bc
indicates a base-collector capacity.
In an HBT, even when the base concentration is high, sufficient current amplification can be obtained owing to the effect of band discontinuity of the valence band (&Dgr;Ev). Therefore, the cut-off frequency f
t
can be increased by reducing the thickness of the base as well as the base resistance R
b
can be reduced by increasing the base concentration, so that the maximum oscillation frequency f
max
can be high.
When an HBT is used at a frequency of approximately 0.8 through 2 GHz used for portable telephones and the like, however, maximum stable gain (MSG) at the frequency is more significant than the maximum oscillation frequency f
max
.
FIGS. 10 and 11
show the results of simulation of the MSG at a frequency of 2 GHz of a conventional HBT.
FIG. 10
is a diagram of dependency on the base-collector capacity C
bc
of the MSG at 2 GHz of the conventional HBT, and
FIG. 11
is a diagram of dependency on the base resistance R
b
of the MSG at 2 GHz of the conventional HBT. In these graphs, the abscissas are standardized by an initial value C
bcO
of the base-collector capacity C
bc
and an initial value R
bO
of the base resistance R
b
, respectively. It is understood from the results that the MSG minimally depends upon the base resistance R
b
but largely depends upon the base-collector capacity C
bc
at a frequency of 2 GHz. Accordingly, in order to fabricate an HBT with large MSG, it is effective to employ a structure with a small base-collector capacity C
bc
for the HBT. For attaining a small base-collector capacity C
bc
in the HBT, it is effective to reduce the area of a region in the base where minority carriers are not injected from the emitter. Therefore, it is effective to dispose a base electrode between emitter regions in the sectional structure of the HBT. Now, a method of fabricating an HBT having such a structure will be described with reference to
FIGS. 12A through 12D
,
13
A and
13
B.
First, in a procedure shown in
FIG. 12A
, a collector contact layer
32
of n
+
—GaAs, a collector layer
33
of n

—GaAs, a base layer
34
of p
+
—GaAs, an emitter layer
35
of n—InGaP and an emitter contact layer
36
of n—GaAs and n
+
—InGaAs are successively deposited by epitaxial growth on a GaAs substrate
31
. Then, a WSi film
37
, that is, a metal film with a high melting point, is deposited thereon by sputtering.
Next, in a procedure shown in
FIG. 12B
, a resist (not shown) is formed on the substrate and is subsequently patterned. Then, an opening for exposing a surface of the emitter contact layer
36
is formed in the WSi layer
37
through reactive dry etching using the resist as a mask. Thus, the WSi layer
37
is formed into an emitter electrode
38
having the opening for exposing the surface of the emitter contact layer
36
.
Then, in a procedure shown in
FIG. 12C
, the emitter contact layer
36
of n—GaAs and n
+
—InGaAs is patterned through etching using the emitter electrode
38
as a mask and a mixture of sulfuric acid, hydrogen peroxide and water as an etchant. At this point, the emitter layer
35
of n—InGaP is never etched by the etchant (the mixture of sulfuric acid, hydrogen peroxide and water). Specifically, the emitter contact layer
36
is patterned by completely selective etching in this procedure.
Next, in a procedure shown in
FIG. 12D
, a resist pattern (not shown) for defining a base region on the substrate is formed. By using the resist pattern as a mask, the emitter layer
35
is patterned through etching using an etchant of a mixture of hydrochloric acid and water. Thereafter, through etching using an etchant of a mixture of sulfuric acid, hydrogen peroxide and water, the base layer
34
is patterned and the collector layer
33
is partly etched.
Subsequently, in a procedure shown in
FIG. 13A
, a resist pattern (not shown) for forming a collector electrode on the substrate is formed. By using the resist pattern as a mask, an opening for exposing a surface of the collector contact layer
32
is formed in the collector layer
33
through etching using an etchant of a mixture of sulfuric acid, hydrogen peroxide and water. Then, a collector electrode
39
of AuGe/Au is formed by lift-off on the surface of the collector contact layer
32
exposed in the opening. Thereafter, a heat treatment is carried out at 450° C., so that the collector electrode
39
can attain a good ohmic characteristic.
Next, in a procedure shown in
FIG. 13B
, a resist pattern (not shown) for forming a base electrode on the substrate is formed. By using the resist pattern as a mask, an opening for exposing a surface of the base layer
34
is formed in the emitter layer
35
through etching using an etchant of a mixture of hydrochloric acid and water. Then, a base electrode
40
of Ti/Pt/Au is formed by the lift-off on the surface of the base layer
34
exposed in the opening.
Through the aforementioned procedures, an HBT having the structure with a small base-collector capacity C
bc
is completed.
Furthermore, in order to reduce surface recombination, which leads to decrease of the current amplification, on the interface between the emitter and the base of the HBT, the emitter layer
35
is generally formed from an emitter region
41
disposed below the emitter contact layer
36
and depleted emitter protection layers
42
and
43
formed in the periphery of the emitter region
41
as is shown in FIG.
14
. The depleted emitter protection layers
42
and
43
are also designated as guard rings or ledges.
The conventional HBT described above has, however, a problem that sufficient MSG cannot be attained at a frequency of several GHz.
SUMMARY OF THE INVENTION
The present invention was devised to overcome the aforementioned problem, and an object is providing a bipolar transistor attaining large MSG and a method of fabricating the same.
The bipolar transistor of this invention comprises a collector layer; a base layer deposited on the collector layer; and a semiconductor layer deposited on the base layer in the shape of a ring along an outer circumference of the base layer, wherein the semiconductor layer includes a ring-shaped emitter region functioning as an emitter, and an outer edge of th

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