Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Reexamination Certificate
2002-02-26
2003-03-11
Nguyen, Tuan H. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
C438S312000, C257S198000
Reexamination Certificate
active
06531722
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a Hetero-Bipolar-Transistor (HBT) made of III-V group compound semiconductors.
2. Related Prior Art
The HBT having a high current gain and an excellent high frequency performance is going to utilize as an amplifying device for an optical transceiver in high-speed optical communications. The reason HBT shows such superior performance is that a semiconductor material is use in an emitter region, whose energy gap is wider than that used in a base region. Due to this wide gap emitter, a carrier injection into the emitter region can be maintained large even in the high carrier concentration in the base region, thus shows the excellent high frequency performance.
Although the HBT is an attractive device due to its high-speed characteristics and has improved mainly in this frequency performance, similar to other electron devices and optical devices, it is necessary to pay attentions to not only the high-speed characteristics but also its reliability.
In conventional HBTs, several semiconductor layers are sequentially grown. A collector layer composed of InGaAs, a base layer composed of InGaAs, and an emitter layer composed of InP are grown on the substrate in this order. After the growth, several times of etchings of respective layer form an emitter mesa structure and a base mesa structure. A collector electrode, a base electrode, and an emitter electrode are formed on the collector, the base, and the emitter, respectively. Thus, the HBT is completed.
In such conventional HBTs, a portion of the base layer, where the emitter mesa structure is formed thereon, operates as an intrinsic base. Since the emitter layer is formed just underneath the emitter mesa structure, side surfaces of the emitter layer are exposed to ambient. The edge of the interface between the emitter layer and the base layer, which is coincide with side surfaces of the emitter layer, is close to the intrinsic base. Therefore, it is favorable for the reliability to locate side surfaces of the emitter layer apart from the intrinsic base region.
SUMMARY OF THE INVENTION
The object of the present invention is to provide the new structure of HBT with high reliability.
The device according to the present invention comprises a semiconductor substrate, a sub-collector layer on the substrate, a collector layer on the sub-collector layer, a base layer made of InGaAs on the collector layer, an InP layer on the base layer, and an emitter contact layer made of InGaAs on the emitter layer. The InP layer is provided within a first region on a primary surface of the substrate. The InGaAs emitter contact layer is provided within a second region contained in the first region. Besides, the emitter contact layer is provided within a region where the sub-collector and the collector are overlapped to each other.
Since a projected area of the emitter contact layer upon the substrate is smaller than that of the InP layer, the portion of the InP layer just underneath the emitter contact layer is able to behave as an intrinsic emitter. The configuration that the intrinsic emitter is apart from side surfaces of the InP layer enhances the reliability of the HBT.
On the second aspect of the present invention, the HBT comprises a substrate, a sub-collector layer on the substrate, a collector layer on the subcollector layer, an InGaAs base layer on the collector layer, an InP layer on the base layer, and an emitter contact layer on the InP layer. The InP layer is provided within a first region on a primary surface of the substrate, and the emitter contact layer is provided within the second region involved in the first region. The second region includes the portion where the collector layer and the sub-collector layer are overlapped to each other and regions surrounding the overlapping portion.
Even in the configuration of the second aspect of the invention, since the effective emitter is formed in the region where the InGaAs emitter contact layer and the InP layer are overlapped to each other, the intrinsic emitter is apart from side edge of the InP layer, thus enhances the reliability.
When the sub-collector layer is formed in an island shape, inclined surfaces are exposed in the edge of the sub-collector layer. The semiconductor material grown onto such inclined surfaces shows different etching endurance from those formed on the plane surface. Therefore, it is likely to be caused the defect, such as etching pit, when semiconductor layers grown onto the inclined surface is soaked into the etching solution. According to the present invention, since the emitter contact layer covers such inclined surfaces, it is never exposed to the etchant, thus restrained from the creation of the defect and so prevented from deterioration.
The HBT of the present invention comprises a base electrode formed on a region where the base layer and the InP layer are overlapped therein. In this configuration, since the InP layer extends under the base electrode, the intrinsic emitter region contacting to the emitter contact layer is enable to be apart from side surfaces of the InP layer.
It is favorable that the thickness of the InP layer is so as to make carriers tunneling therethrough. In this configuration, the base current flows from the base electrode to the base layer or from the base layer to the base electrode.
It is further favorable that the InGaAs emitter contact layer has the inverse mesa structure and the base electrode faces the side surfaces of such inverse mesa structure of the emitter contact layer. The inverse mesa structure has a form like a trapezoid, in which the lower side of parallel lines is shorter than that of the higher side. Due to this shape, an emitter electrode and a base electrode are obtainable through the self-aligned process. Since respective electrodes are electrically isolated to each other while the distance between the electrodes is close enough, the base resistance can be reduced, thus, enhances the high frequency performance.
Moreover, it is further favorable to form the sub-collector layer so as to have a normal mesa structure and to be covered with the collector layer.
REFERENCES:
patent: 5001534 (1991-03-01), Lunardi et al.
patent: 5672522 (1997-09-01), Streit et al.
patent: 5981985 (1999-11-01), Yang et al.
patent: 6333236 (2001-12-01), Koganei
patent: 6403991 (2002-06-01), Kurokawa et al.
Kotani Kenji
Yaegashi Seiji
Yanagisawa Masaki
Yano Hiroshi
Nguyen Tuan H.
Smith , Gambrell & Russell, LLP
Sumitomo Electric Industries Ltd.
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