Bipolar power transistors and manufacturing method

Details Bipolar power transistors and manufacturing method Bipolar power transistors and manufacturing method

1998-08-28

2001-03-06

Smith, Matthew (Department: 2825)

Active solid-state devices (e.g., transistors, solid-state diode

Bipolar transistor structure

With means to increase current gain or operating frequency

C257S565000, C257S585000

Reexamination Certificate

active

06198156

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a vertical bipolar power transistor intended for radio frequency applications, especially for use in an amplifier stage in a radio base station, and a method for manufacturing the bipolar power transistor.
STATE OF THE ART
Bipolar transistors for power amplification at high frequencies must comply with a number of detail requirements concerning power amplification, robustness, breakdown voltage, noise, distortion, capacitances, input and output impedances, etc., at a specified supply voltage and operating frequency. The operating frequencies for modern telecommunication electronics can vary in the radio and microwave region. The requirements for the output power varies from some few watts to several hundred watts, where in the latter case several parallel connected components in a capsule are used. Power transistors work with high signal levels and high current densities. Computer tools which exist today are not capable in a detailed manner of simulating the behaviour or performance in practical applications.
The semiconductor material which is most used for power transistors, at least at frequencies under 3 GHz, is silicon. Furthermore, depending on the high mobility of the electrons in comparison with holes, power transistors of the npn-type are used principally. The transistor structure is normally vertical with the contact of the collector on the backside of the silicon substrate. A collector layer is epitaxially deposited on the substrate. The base and the emitter are formed through diffusion or ion implantation from above in the epitaxial layer. By varying the degree of doping in the collector, base and/or the emitter, it is possible to obtain different types of frequency and breakdown voltage characteristics. Different horizontal geometries give transistors with different current capacities.
Distortion occurs when the size of the output signal is not exactly proportional to the input signal. Active semiconductor arrangements, such as bipolar transistors and field effect transistors will always produce a non-linear output signal depending on the non-linear input/output characteristics, and during coupling at high frequencies also internal and external parasitic elements. Non-linearities in a bipolar arrangement are more complex than those in a field effect transistor because of the exponential input/output relationship of the former.
The linearity or the absence of distortion of the output transistor determines important parameters for communication systems such as, for example, interference with adjacent channels and therefore consequently the frequency margin which is necessary between adjacent channels.
The fundamental non-linear relationship between the input and the output signals of a bipolar power transistor cannot be reduced without changing the shape or material of the transistor. A reduction of parasitic elements such as capacitances is, however, easier to achieve, whereby the most important should be those on the output of the transistor, which in the main are formed from the capacitance of the base collector and the parasitic metal-substrate capacitances.
It is known from W. P. Dumke, “Transistor Collector Doping for Reduced Capacitance”, IBM Technical Disclosure Bulletin, Vol. 26, No. 2, July 1983 to reduce the base collector capacitance of bipolar high-speed transistors of the npn-type through producing a varying doping profile on the epitaxial collector. The donor concentration N
D,C
varies from 10
19
-10
18
lowest down towards the substrate to 10
16
inside the epitaxial layer and then increases again to be closer to 10
17
at the surface adjacent to the base.
DISCLOSURE OF THE INVENTION
The object of the present invention is to provide a vertical bipolar power transistor which comprises a substrate, an epitaxial collector layer on the substrate, a base and an emitter formed in the epitaxial layer, with higher performance, in particular an improved linearity.
This is achieved by reducing the dC/dV-value and thereby the so-called C(V)-swing. Such a reduction is achieved by doping the power transistor collector in such a way that the resulting doping profile N
c
is greatly dependent on the depth x of the collector, i.e. N
c
=N
c
(x).
In more detail the degree of doping N
c
(x) of the epitaxial collector layer varies from the surface adjacent to the base and downwardly to at least half the depth of the collector layer, essentially according to a polynomial of at least the second degree, a
0
+a
1
x+a
2
x
2
+. . . , where a
0
is the degree of doping at the surface adjacent to the base, x is the vertical distance from the same surface and a
1
, a
2
, . . . are constants. Preferably, the degree of doping varies according to a
0
+a
n
x
n
, where n>>1 or according to a
0
e
Bx
, where B is a constant.
The transistor further comprises preferably a thick insulating oxide between the epitaxial collector layer and the higher situated metallic connecting layers.
According to a manufacturing method for the bipolar transistor according to the invention, the epitaxial collector layer is doped by doping substances being supplied according to a reduced extent during deposition of the epitaxial collector layer. Alternatively, the epitaxial collector layer is deposited as a multilayer structure where each and all of the constituent layers have a constant degree of doping, whereafter the epitaxial layer is heat-treated in such a way that the resulting doping profile becomes essentially smooth. The constituent layers in the multilayer structure can be deposited with a constant thickness and a non-linearly diminishing degree of doping, or with an increasing thickness and a linearly diminishing degree of doping.
According to another method, the epitaxial collector layer is doped with a constant degree of doping, whereafter so-called counter doping takes place by implanting ions of the opposite conductivity type through the upper surface of the epitaxial collector layer followed by driving-in through heat treatment. An advantage of the invention is that the linearity of the power transistor is considerably improved when the transistor collector is doped by a method according to the invention. Other performances, such as for example breakdown voltage, upper boundary frequency and amplification can furthermore be improved by suitably chosen numerical values of the doping profile.
The performance of the power transistor is further improved when a thick field oxide is used. The base metal-collector capacitance is reduced in this case.


REFERENCES:
patent: 5071778 (1991-12-01), Solheim
patent: 5237200 (1993-08-01), Namba et al.
patent: 5270223 (1993-12-01), Liu
patent: 5488252 (1996-01-01), Johansson et al.
patent: 5986326 (1999-11-01), Kato
patent: 0762511 (1997-03-01), None
W. P. Dumke, “Transistor Collector Doping for Reduced Capacitance,” IBM Technical Disclosure Bulletin, vol. 26, No. 2, Jul. 1983, p. 492.
The Penguin Dictionary of Electronics, Second Edition, V. Illingworth, pp. 185-186, 1988.

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