Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure
Reexamination Certificate
2002-12-09
2004-11-09
Nhu, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
C257S511000
Reexamination Certificate
active
06815800
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to bipolar transistors and, in particular, relates to a method for manufacturing a bipolar transistor with reduced parasitic bipolar conduction.
DESCRIPTION OF THE RELATED ART
When NPN and PNP bipolar transistors are integrated into CMOS, BiCMOS and BCD processes, an inherent parasitic bipolar transistor results. The parasitic bipolar transistor is formed by the base and the collector regions of the main bipolar device and the substrate on which the main bipolar device is built.
FIG. 1
illustrates a typical NPN bipolar transistor
10
built in a CMOS process. The main bipolar device
10
includes an n+ region as the emitter, a p-type region as the base (P-Base) and an N-well formed in a p-type epitaxial layer as the collector. However, in such a transistor structure, a parasitic PNP bipolar transistor is also formed where the P-Base region functions as the emitter, the N-well functions as the base, and the p-type substrate functions as the collector.
The parasitic transistor formed along with the main bipolar device is undesirable for several reasons. Specifically, when the base to collector junction of the main bipolar device gets forward biased, such as during normal circuit operation or during an ESD event, the parasitic transistor can turn on and conducts a substantial amount of current. In fact, when the parasitic transistor is turned on, the transistor can inject high currents into the substrate, resulting in circuit malfunction or latch-up.
FIG. 2
illustrates a typical PNP bipolar transistor built in a BiCMOS process. PNP bipolar transistor
12
is formed by a p+ region as the emitter, an n-type region as the base (N-Base) and a P-Well as the collector. An N-type buried layer is included to isolate the PNP transistor from the substrate. As a result of forming PNP bipolar transistor
12
in a BiCMOS process, a parasitic NPN bipolar transistor is formed. The parasitic NPN bipolar transistor includes the N-Base region as the emitter, the P-Well as the base and the N-well isolation region or the N-type buried layer as the collector. The N-type buried layer will collect electrons injected from the N-base region as a result of parasitic conduction. Because the buried layer is generally connected to the power supply or to the emitter of PNP transistor
12
, electron injection into the buried layer will increase the supply currents which is undesirable.
Conventional approaches to suppressing parasitic conduction include incorporating sinker structures to isolate the bipolar devices and thereby disabling the parasitic transistor. However, the use of sinker structures increases the size of the bipolar transistors and consequently increases the cost of the manufacturing process. Therefore, an improved method to suppress parasitic bipolar conduction in integrated bipolar junction transistors is desired.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention, a bipolar transistor includes an auxiliary diffusion region formed in the base region having a conductivity type opposite to the base region and being electrically coupled to the base region. The auxiliary diffusion region forms a secondary parasitic transistor having the effect of suppressing parasitic bipolar conduction caused by a primary parasitic bipolar device associated with the bipolar transistor.
According to one embodiment of the present invention, a bipolar transistor device is formed on a semiconductor material of a first conductivity type and includes a base region, an emitter region and a collector region. The bipolar transistor device includes a first diffusion region formed in the base region and having a conductivity type opposite to the conductivity type of the base region. The first diffusion region being electrically coupled to the base region.
In one embodiment, the first diffusion region is formed using the same processing steps as the emitter diffusion and thus has the same doping profile and electrical characteristics as the emitter region.
Alternately, the auxiliary diffusion region can be incorporated in the collector region. Thus, according to another embodiment of the present invention, a bipolar transistor device is formed on a semiconductor material of a first conductivity type and includes a base region, an emitter region and a collector region. The bipolar transistor device includes a first diffusion region formed in the collector region and having a conductivity type opposite to the conductivity type of the collector region. The first diffusion region being electrically coupled to the collector region.
The present invention is better understood upon consideration of the detailed description below and the accompanying drawings.
REFERENCES:
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patent: 5117271 (1992-05-01), Comfort et al.
patent: 5369291 (1994-11-01), Swanson
patent: 5869873 (1999-02-01), Yu
patent: 6239477 (2001-05-01), Johnson
patent: 6323074 (2001-11-01), Jiang et al.
patent: 6365932 (2002-04-01), Kouno et al.
patent: 6420771 (2002-07-01), Gregory
Cook Carmen C.
Micrel Inc.
Nhu David
Patent Law Group LLP
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