Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure
Reexamination Certificate
2000-05-17
2002-09-03
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
C257S197000
Reexamination Certificate
active
06445058
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor processes for fabricating bipolar junction transistors, and more particularly to those processes for creating bipolar junction transistors having a field plate electrode.
2. Description of the Related Art
The fabrication of bipolar transistors is well known to those skilled in the art. In a high voltage process technology, it is often necessary to use a “field plate” structure to reduce the surface electric field of a diffused junction (e.g., the collectorbase junction) in order to raise its avalanche breakdown voltage. Traditionally, such a field plate, whether implemented using a metal layer or a polysilicon layer, would consume extra device layout area as it would be necessary to contact this field plate using another interconnect layer.
The fabrication of polysilicon-emitter bipolar junction transistors is also well known to those skilled in the art. Typically, an opening is formed in the oxide overlying the base region (i.e., the base oxide), polysilicon is deposited, the polysilicon is doped by, for example, an implant, which dopant is then diffused through the polysilicon, through the opening in the base oxide, and into the substrate therebelow to create the emitter region within the previously-formed base region.
However, many attractive markets exist which require an integrated circuit to tolerate rather high voltages (e.g., 100-150 volts), and yet require the integrated circuit to be relatively high in performance. For example, subscriber circuits for telecommunications applications must withstand the ringing voltage associated with legacy telephone local loops, but are looked upon to support increasingly faster data rates as digital transmission techniques become more and more pervasive. Consequently, continued improvements are desired in a simple, cost-effective semiconductor process which provides high-voltage bipolar transistors having a high avalanche breakdown voltage.
SUMMARY OF THE INVENTION
A single-layer electrode may be used to form a field plate structure that integrally contacts an emitter region of a bipolar junction transistor by construction, without intervening interconnect layers or contacts. In one embodiment, a polysilicon electrode forms a field plate electrode which integrally interconnects to a traditional diffused emitter region formed before the polysilicon layer is deposited. This allows for deeper emitter regions required by the deep base regions needed for high-voltage bipolar devices. Moreover, the polysilicon layer, including the polysilicon electrode forming the field plate electrode, may be used as a local interconnect layer.
One embodiment of the invention useful in a semiconductor fabrication process is a method of forming a bipolar junction transistor including a field plate structure. The method includes forming a collector region, a base region, and an emitter region within a semiconductor body, said collector and base regions defining therebetween a collector/base junction intersecting a top surface of the semiconductor body. The method includes then forming a single-layer conductive electrode which contacts the emitter region and which also lies above the collector/base junction at its intersection with the top surface, said conductive electrode extending at least a predetermined distance in a direction toward and disposed over the collector region and also extending at least a predetermined distance in a direction toward and disposed over the base region, thereby forming an integral field plate structure and emitter region contact, and contacting the conductive electrode to provide an electrical connection to the integral field plate structure and emitter region contact.
In another embodiment of the invention useful in a semiconductor fabrication process, a method of forming a bipolar junction transistor including a field plate structure includes forming a base region and a collector region within a semiconductor substrate, said base region and said collector region defining therebetween a junction intersecting a top surface of the substrate, forming a first dielectric layer overlying the collector region and a second dielectric layer overlying the base region, and forming an emitter region within the base region through an opening in the second dielectric layer overlying the base region. The method further includes then forming a single-layer conductive electrode overlying the collector/base junction at its intersection with the top surface, said single-layer conductive electrode extending at least a predetermined distance in a direction toward and disposed over the first dielectric layer overlying the collector region, and extending at least a predetermined distance in a direction toward and disposed over the second dielectric layer overlying the base region, and which single-layer conductive electrode also contacts the emitter region through the opening in the second dielectric layer, thereby forming an integral field plate structure and emitter region contact, and contacting the single-layer conductive electrode to a subsequently-formed interconnect layer to provide both an electrical connection to the emitter region and to bias the field plate structure with the emitter region's voltage.
In another embodiment of the invention, a bipolar junction transistor structure includes a collector region, a base region, and an emitter region formed within a semiconductor body, said collector and base regions defining therebetween a collector/base junction intersecting a top surface of the semiconductor body. The structure further includes a single-layer conductive electrode which contacts the emitter region and which lies above the collector/base junction at its intersection with the top surface, said conductive electrode extending at least a predetermined distance in a direction toward and disposed over the collector region and also extending at least a predetermined distance in a direction toward and disposed over the base region, thereby forming an integral field plate structure and emitter region contact. The structure also includes an interconnect element contacted to the conductive electrode to provide an electrical connection to the emitter region and to the field plate structure.
In yet another embodiment of the invention, a bipolar junction transistor structure includes: (1) a collector region formed within a semiconductor body having, where the collector region reaches a top surface of the semiconductor body, a first dielectric layer thereabove; (2) a base region formed within the collector region having, where the base region reaches the top surface of the semiconductor body, a second dielectric layer thereabove, said collector and base regions defining therebetween a collector/base junction intersecting the top surface of the semiconductor body; (3) an emitter region formed within the base region; (4) a polysilicon electrode disposed above and contacting the emitter region, and further generally disposed above the intersection of the collector/base junction with the top surface of the semiconductor body, said conductive electrode extending at least a predetermined distance in a direction toward and disposed over the collector region and also extending at least a predetermined distance in a direction toward and disposed over the base region, whereby the conductive electrode forms an integral field plate structure and emitter region contact; and (5) an interconnect element contacted to the conductive electrode for providing an electrical connection to the emitter region and for biasing the field plate structure with the emitter region voltage.
The present invention may be better understood, and its numerous features and advantages made even more apparent to those skilled in the art by referencing the detailed description and accompanying drawings of the embodiments described below. These and other embodiments of the present invention are defined by the claims appended hereto.
REFERENCES:
patent: 4887142 (1989-12-01),
Moore William E.
Shiota Philip S.
Thiel Frank L.
Legerity Inc.
Nelms David
Nhu David
Zagorin O'Brien & Graham LLP
LandOfFree
Bipolar junction transistor incorporating integral field plate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Bipolar junction transistor incorporating integral field plate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bipolar junction transistor incorporating integral field plate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2849900