Bipolar junction transistor and fabricating method

Details Bipolar junction transistor and fabricating method Bipolar junction transistor and fabricating method

2007-11-20

2007-11-20

Luu, Chuong A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

C257S197000, C257S593000, C257S588000

Reexamination Certificate

active

10709568

ABSTRACT:
A bipolar junction transistor includes a dielectric layer formed on a predetermined region of a substrate, an opening formed in the dielectric layer and a portion of the substrate being exposed, a semiconductor layer formed on a sidewall and a bottom of the opening and on a portion of the dielectric layer outside the opening, a spacer formed on the semiconductor layer to define a self-aligned emitter region in the opening, an emitter conductivity layer being filled with the self-aligned emitter region and a PN junction being formed between the emitter conductivity layer and the semiconductor layer, and a salicide layer formed on the emitter conductivity layer and on the portion of the semiconductor layer extending outside the opening.

REFERENCES:
patent: 4800176 (1989-01-01), Kakumu et al.
patent: 6759731 (2004-07-01), Chen
patent: 2003/0096486 (2003-05-01), Chuang et al.
patent: WO 98/57367 (1998-12-01), None

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