Bipolar field-effect electrically erasable programmable read onl

Details Bipolar field-effect electrically erasable programmable read onl Bipolar field-effect electrically erasable programmable read onl

1991-01-24

1992-02-18

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 43, 357 235, H01L 21265

Patent

active

050894331

ABSTRACT:
A floating gate electrically erasable MOS transistor comprising a silicon substrate having source and drain regions and a channel region disposed between the source region and the drain region. The source and drain regions are formed from a semiconductor material having one conductivity type, and the channel region is formed from a semiconductor material having a conductivity type opposite the conductivity type of the semiconductor material forming the source and drain regions. A control gate region is formed in the silicon substrate horizontally spaced apart from the channel region. The gate region is formed from a semiconductor material having the same conductivity type as the semiconductor material forming the source and drain regions. A polysilicon layer bridges the control gate region and the channel region for communicating an electrical potential from the first gate region to the channel region. A silicon dioxide layer is disposed between the polysilicon layer and the control gate and channel regions for insulating the polysilicon layer from these regions. The polysilicon layer thus serves the function of a floating gate, and is selectively controlled through the first gate region for forming a conductive channel between the source and drain regions. The drain region of the MOS transistor is coupled to the base terminal of a bipolar sensing transistor for forming an EEPROM.

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