Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Patent
1994-04-18
1996-03-26
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
257355, 257362, 257363, 257566, 257577, H01L 2900
Patent
active
055023282
ABSTRACT:
CMOS integrated circuit buffers typically use a dual-diode electrostatic discharge (ESD) protection technique. However, in some cases that technique inadvertently causes one of the diodes to conduct when a desired signal voltage is present on the bondpad, thereby clipping the desired signal. This occurs, for example, when an output buffer on an unpowered device is connected to an active bus, or when the input buffer of a 3 volt device receives a 5 volt signal. The present invention solves this problem by using a bipolar (e.g., pnp) protection transistor connected between the bondpad and a power supply bus (e.g., V.sub.SS). The base of the transistor is connected to the bondpad through a resistor that provides a time delay due to the R-C time constant that includes distributed capacitance. The time delay allows for a high conduction period, during which an ESD event is conducted through the bipolar transistor, thereby protecting the input or output buffer.
REFERENCES:
patent: 4806999 (1989-02-01), Strauss
patent: 4814853 (1989-03-01), Uchida
patent: 4821089 (1989-04-01), Strauss
patent: 4994874 (1991-02-01), Shimizu et al.
patent: 5072273 (1991-12-01), Avery
patent: 5138413 (1992-08-01), Grosset et al.
Chen Che-Tsung
Gabara Thaddeus J.
Morris Bernard L.
Smooha Yehuda
AT&T Corp.
Carroll J.
Fox James H.
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