Bipolar comparator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S053000

Reexamination Certificate

active

06480038

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a bipolar comparator containing an asymmetric differential amplifier stage.
Comparators are circuit configurations, which have been generally known for a long time so only the basic configuration and the operation of such a comparator will be discussed in the text, which follows.
Comparators are generally used for detecting a voltage referred to as a reference potential. As soon as the voltage to be detected exceeds a predetermined value, the so-called threshold value, a signal can be picked up at the output of the comparator, which indicates that the threshold value, which for example, can be the reference voltage, is exceeded. If, in contrast, the threshold value is not reached by the input voltage at the comparator, the output of the comparator outputs an output signal which also unambiguously signals a falling short of the threshold value. In the case of a comparator having an asymmetric output, two inputs and a single output are provided. At the output terminal, two different voltage levels can be picked up depending on whether the input voltage applied to the input terminals is greater than or less than the reference voltage.
A standard version of a bipolar comparator exhibits a differential amplifier at its input, which has two bipolar transistors, the load paths of which are connected to input terminals for applying an input voltage at an emitter end. The comparator typically has an offset &Dgr;Vbe, Vbe being a voltage between a base and an emitter of the bipolar differential amplifier transistors.
The problem with such bipolar comparator circuits is the fact that at the collector terminals, leakage currents flow, which can change an amount of an offset &Dgr;Vbe in an undefined manner. The offset &Dgr;Vbe caused by the leakage currents is changed in a defined manner even if the leakage currents occurring in the two bipolar transistors are identical per unit area of the collector, that is to say there is optimum matching. However, the change in offset leads to a more or less great impairment of the accuracy of the comparator and can result in an operational failure of the comparator in the extreme case.
In conventional comparator configurations, therefore, it is attempted to avoid the leakage currents at the collectors as much as possible or at least to reduce them, as a result of which, naturally, a compromise must be made in accuracy and thus also in operability of the comparator configuration. It is particularly in the case of very high temperatures, for example within a range of more than 150° C. and/or a not inconsiderable injection of minority charge carriers into the semiconductor substrate, also called reverse current in the case of power semiconductors, that avoiding the leakage current is possible only to a certain extent or not at all. For this reason, it has hitherto been possible to use conventional bipolar comparator configurations based on avoiding leakage currents only to a restricted extent under the conditions described. However, there is a requirement to use existing comparator configurations even at higher operating temperatures and minority charge carrier injections.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a bipolar comparator which overcomes the above-mentioned disadvantages of the prior art devices of this general type, which remains largely unaffected in its operability and accuracy even with high collector leakage currents.
With the foregoing and other objects in view there is provided, in accordance with the invention, a bipolar comparator with an asymmetric differential amplifier stage.
The comparator contains current sources including a first current source and a second current source each having an output and input terminals including a first input terminal for receiving a first input potential and a second input terminal for receiving a second input potential. Transistors, including a first transistor and a second transistor each having a control electrode short-circuited to one another, a load electrode, and a load path, are provided. The load path of the first transistor is disposed in series between the first current source and the first input terminal. The load path of the second transistor is disposed in series between the second current source and the second input terminal. A supply terminal for receiving a supply potential is connected to the current sources. An output terminal is connected between the second current source and the load electrode of the second transistor. An output signal is available for picked up at the output terminal. A third transistor is provided and has a load path disposed in parallel with the load path of the first transistor. The first transistor is connected as a diode resulting in a diode-connected first transistor. The first current source generates a first operating current being a multiple of a second operating current generated by the second current source and the multiple corresponds to an effective area ratio of the first and the third transistor with respect to the second transistor.
By connecting the additional transistor in parallel with a transistor of the differential amplifier stage and by a suitable choice of area ratios and of the currents, it becomes possible for the influence of the collector leakage currents on the accuracy of the offset voltage to be eliminated. The offset voltage is then largely leakage-current-independent over wide ranges of the operating current even with increasing temperature and has a defined temperature dependence that can be compensated for, for example, by a shunt resistor or similar circuit device. The essential prerequisite for this is, however, very good matching of the two transistors of the differential amplifier stage and of the additional transistor. The transistor added additionally which is also called a dummy transistor in the text which follows is thus only used for eliminating the leakage-current-dependence of the offset voltage. However, the dummy transistor has no influence whatever on the actual operation of the comparator.
It is essential for the operation of the comparator configuration according to the invention that the sum of effective or normalized collector areas of the diode-connected transistor and of the dummy transistor connected in parallel therewith is a multiple of the effective or normalized collector area of the respective other transistor of the differential amplifier stage. By effective (or normalized) collector area, the (normalized) boundary area between the collector and substrate is meant. The multiple also corresponds to the ratio of the operating currents of the two current sources. As already mentioned, the ratio of the currents provided by the two current sources should very precisely correspond to the effective collector area ratios. The effective collector area ratios are obtained from the corresponding area ratios of the first transistor and the dummy transistor divided by the collector area of the second transistor.
In a very advantageous embodiment of the invention, a correction circuit is provided which essentially contains two current balancing circuits. The outputs of the current balancing circuits are connected to in each case one of the current sources so that a correction current can be superimposed on the operating current generated by the respective current sources. In the case where at least one leakage current exceeds the operating current of the respective current source, it is just this operating current on which a correction current is superimposed in such a manner that the sum of the currents is greater in every case than the corresponding leakage current. This makes it possible to ensure that the current through the load path of the differential amplifier transistors is greater in every case than the corresponding leakage current. Thus, no unwanted and abrupt rise in offset voltage can occur. By the correction circuit, the operating current supplied to the two transistors of the differe

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