BIPMOS decoder circuit

Details BIPMOS decoder circuit BIPMOS decoder circuit

1987-04-27

1989-08-15

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307446, 307449, 307570, H03K 1716, H03K 19082, H03K 1760

Patent

active

048577723

ABSTRACT:
A decoder incorporates the advantageous features of both bipolar and BICMOS decoding circuits through the use of BIPMOS technology. PMOS gating transistors are used to control the operation of bipolar output transistors. It is only necessary to operate the PMOS transistors with relatively small drain voltage variations, since the bipolar transistors are sensitive to such small variations. Further, transient signals are referenced to one power supply voltage only, to thereby make the logic swing and performance characteristics of the decoder independent of power supply voltage variations. Therefore it becomes possible to use PMOS transistors that have smaller voltage requirements than conventional CMOS circuits.

REFERENCES:
patent: 4385370 (1983-05-01), Isogai
patent: 4612456 (1986-09-01), Vasseghi et al.
patent: 4612458 (1986-09-01), Vasseghi et al.
patent: 4730132 (1988-03-01), Watanabe et al.

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