Binary to binary coded decimal and binary coded decimal to binar

Details Binary to binary coded decimal and binary coded decimal to binar Binary to binary coded decimal and binary coded decimal to binar

1992-09-30

1993-10-05

Shaw, Dale M.

Boots, shoes, and leggings

364DIG1, 3642328, 3642604, 36471503, 341 84, 341 85, G06F 506

Patent

active

052513211

ABSTRACT:
Binary-Coded-Decimal to binary (DTB) and binary to Binary Coded Decimal (BTD) instructions are executed by an address and execution (AX) chip, a decimal numeric (DN) chip, and a cache. For a DTB instruction, the DN chip receives the operand to be converted from the cache, saves the sign, and stores it in a conversion register. When a bit is converted, a Ready-to-Send signal is sent on a COMFROM bus with a Ready-to-Receive Command on a COMTO bus causes the AX chip to accept the bit and the DN chip to generate the next bit until the resultant operand is produced. If the operand to be converted is negative, the DN chip inverts each remaining bit after the first "1" to obtain a two's-complement result. The result in either case is sent to the cache. For a BTD instruction, the AX chip receives the operand to be converted from the cache, send the sign bit to the DN chip and then the bits of the operand when the Ready-to-Send and Ready to Ready-to-Receive signals are produced. The resultant operand is sent to the conversion register. If the operand is negative, all bits are inverted, and a one is added to produce the resultant in two's complement notation.

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Intel Corporation, "Microprocessors, vol. I", p. 2-1, 1992.

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