Binary signal receiver for time compression multiplexing

Multiplex communications – Wide area network – Packet switching

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Details

328151, 307353, H04J 300

Patent

active

044728000

ABSTRACT:
A receive circuit for binary signals in time compression multiplexing systems mitigates effects of the local data decay tail and zero line wander by means of a sample-and-hold circuit, having a fast attack and a decay time constant equal to a combination of the transmission line, and dc blocking device time constants followed by a subtracting difference amplifier. Power feed of the line via dc blocking capacitors is thus possible. Also higher receiver gain is possible when sampling switch is left on during local data transmission without receiver instability.

REFERENCES:
patent: 3784921 (1974-01-01), Iadipaolo
patent: 4222008 (1980-09-01), Mezrich
patent: 4263521 (1981-04-01), Senger
patent: 4276539 (1981-06-01), Eshraghian et al.

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