Binary multibit multiplier

Details Binary multibit multiplier Binary multibit multiplier

1986-05-27

1988-05-17

Malzahn, David H.

Boots, shoes, and leggings

G06F 752

Patent

active

047455705

ABSTRACT:
A digital multiplier has recoders for recoding the multiplier bits to form selection bits which are applied to selectors for selecting forms of the multiplicand, either the multiplicand itself or multiples of the multiplicand, the selected forms being applied to adders which produce partial products, the adders being interconnected to produce the product. Special product generators simultaneously generate multiples of the multiplicand which are applied to the selectors.

REFERENCES:
patent: 4041292 (1977-08-01), Kindell
patent: 4153938 (1979-05-01), Ghest et al.
patent: 4484301 (1984-11-01), Borgerding
patent: 4646257 (1987-02-01), Essig et al.
Beraud et al., "Parallel Multiplier", IBM Tech. Disclosure Bulletin, vol. 24, No. 11B, Apr. 1982, pp. 6090-6092.

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