Binary divider with carry-save adders

Details Binary divider with carry-save adders Binary divider with carry-save adders

1980-05-05

1982-03-16

Malzahn, David H.

Boots, shoes, and leggings

364767, G06F 754

Patent

active

043204643

ABSTRACT:
A high-speed binary divider is provided which produces two quotient bits per processor cycle using two carry-save adders in a nonrestoring division mode with a delayed sign logic circuit selecting the adder having the required adder result for the current partial remainder.

REFERENCES:
patent: 3223831 (1965-12-01), Holleran
patent: 3293418 (1966-12-01), Thornton
patent: 3319057 (1967-05-01), Githens, Jr. et al.
patent: 3591787 (1971-07-01), Freiman et al.
patent: 3621218 (1971-11-01), Nishimoto
patent: 3733477 (1973-05-01), Tate et al.
patent: 3852581 (1974-12-01), Reynard et al.
patent: 4084254 (1978-04-01), Birney et al.
Tan, "Uniform 2 Bits Quotients Binary Division By Carry-Save Adders", IBM Tech. Disclosure Bulletin, vol. 14, No. 11 Apr. 1972, pp. 3279-3281.

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