Binary data encoding and decoding process

Communications: electrical – Audible indication – Percussion-type sound producer

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360 40, H03M 700

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046723625

ABSTRACT:
A binary data encoding process comprises the steps of separating a given binary data sequence at every two bits by a serial/parallel shift register (18), and converting the separated 2-bit data into a 3-bit code by using a logic circuit (19) and a parallel/serial shift register (20). A conversion pattern in the logic circuit (19) is exclusively determined based on the 2-bit data to be converted, 1-bit data immediately before and 2-bit data immediately after said 2-bit data, and a 3-bit code converted immediately before the conversion of said 2-bit data, wherein a succession of at least one but no more than seven "0" exists between an arbitrary "1" and the succeeding "1" in the converted 3-bit code sequence.

REFERENCES:
patent: 3374475 (1968-03-01), Gabor
patent: 3689899 (1972-09-01), Franaszek
patent: 4337458 (1982-06-01), Cohn
P. A. Franaszek, 1970, Jul. IBM Journal. Res. Develop. "Sequence-State Methods for Run-Length-Limited Coding".
D. T. Tang and L. R. Bahl 1970, Information and Control 17, 436-461 "Block Codes for a Class of Constrained Noiseless Channels".
IEEE Transactions on Magnetics, vol. MAC-12, No. 6, Nov. 1976, pp. 740-742, "An Optimization of Modulation Codes in Digital Recording".

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