Binary adder

Details Binary adder Binary adder

1985-11-25

1989-05-16

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 750

Patent

active

048315788

ABSTRACT:
A binary adder stage in which the two binary inputs are logically combined to produce the Exclusive-OR, the Exclusive-NOR, the NAND and the NOR functions of the two inputs. The carry-input signal is then used to control the generation of the sum output and the carry-output. When the carry-input signal has one binary value, the Exclusive-OR function and the AND function of the binary inputs are produced at the SUM and C.sub.OUT outputs. When the carry-input signal has the other binary value the Exclusive-NOR function and the OR function of the two binary inputs are produced at the SUM and C.sub.OUT outputs.

REFERENCES:
patent: 4417314 (1983-11-01), Best
patent: 4601007 (1986-07-01), Uya et al.
patent: 4621338 (1986-11-01), Uhlenhoff
patent: 4718035 (1988-01-01), Hara et al.
patent: 4730266 (1988-03-01), Van Meerbergen et al.
Weste et al., Principles of CMOS VLSI Design, pp. 317-319, 1985, Addison-Wesley.

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