BIMOS transistor devices having bipolar and MOS transistors form

Details BIMOS transistor devices having bipolar and MOS transistors form BIMOS transistor devices having bipolar and MOS transistors form

1991-06-10

1992-11-24

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 59, 148DIG8, 148DIG9, 257378, H01L 2170, H01L 2700

Patent

active

051660822

ABSTRACT:
This invention provides devices each of which has at least one bipolar transistor and at least one MOS transistor, both formed on a substrate. This invention also provides their fabrication process. Each device is constructed of epitaxial layers of a first and second conductivity types, surfaces of said epitaxial layers being partly exposed, at least one MOS transistor formed in the epitaxial layer of the first conductivity type, and at least one bipolar transistor formed in the epitaxial layer of the second conductivity type. Its fabrication process comprises the steps of forming the epitaxial layer of the second conductivity type on the semiconductor substrate, forming the epitaxial layer of the first conductivity type on a part of the epitaxial layer of the second conductivity type, forming the bipolar transistor in the epitaxial layer of the second conductivity type and then forming the MOS transistor in the epitaxial layer of the first conductivity type.

REFERENCES:
patent: 4443932 (1984-04-01), Mastroianni et al.
patent: 4868135 (1989-09-01), Ogura et al.
Liou et al, "A Single-Poly CMOS Process Merging Analog Capacitors, Bipolar and EPROM Devices", 1989 Symposium on VLSI Technology, Kyoto, Japan (May 22-25, 1989).

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