BIMOS logic gate

Details BIMOS logic gate BIMOS logic gate

1985-12-02

1987-01-20

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307570, 307270, H03K 1901

Patent

active

046381864

ABSTRACT:
A BIMOS circuit is provided wherein an output terminal is coupled between upper and lower NPN push-pull transistors for providing high current drive capability along with no d.c. power dissipation. A first MOS transistor circuit is coupled between an input terminal and the lower transistor for biasing the lower transistor. A second MOS transistor circuit is coupled between the input terminal and the upper transistor for biasing the upper transistor. A third circuit is coupled between the input terminal and the lower transistor and is responsive to the output terminal for biasing the lower transistor.

REFERENCES:
patent: 4425516 (1984-01-01), Wanlass

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