BIMOS logic gate

Details BIMOS logic gate BIMOS logic gate

1986-01-13

1987-03-10

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, 307454, 307270, 307570, H03K 1901, H03K 19082, H03K 19094

Patent

active

046492941

ABSTRACT:
A BIMOS circuit is provided wherein an output terminal is coupled between upper and lower NPN push-pull transistors for providing high current drive capability along with no d.c. power dissipation. A first MOS transistor circuit is coupled between an input terminal and the lower transistor for biasing the lower transistor. A second MOS transistor circuit is coupled between the input terminal and the upper transistor for biasing the upper transistor. A circuit device is coupled between the output terminal and the upper transistor for increasing the output voltage swing.

REFERENCES:
patent: 4103188 (1978-07-01), Morton
patent: 4612458 (1986-09-01), Vasseghi et al.
patent: 4616146 (1986-10-01), Lee et al.
Kraft et al, "Tristate Driver Utilizing Bipolar-Complementary Metal-Oxide Semiconductor Technology", IBM T.D.B., vol. 16, No. 8, 1-1974, pp. 2677-2678.

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