BIMOS current driver circuit

Details BIMOS current driver circuit BIMOS current driver circuit

1991-10-24

1993-11-16

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307254, 307270, 3072967, H03K 1716

Patent

active

052626890

ABSTRACT:
A first IGFET and a first bipolar transistor are connected in series between a first power terminaland a first load terminal. A second IGFET and a second bipolar transistor are connected in series between a second load terminal and a second power terminal. the first and second IGFETs are biased to pass the same load current. The first and second bipolar transistors are selectively turned on at the same time to permit current flow via a load which may be connected between the first and second terminals. When the first and second bipolar transistors are turned-off, they prevent conduction (except for leakage) between the load terminals and the first and second power terminals, if and when the voltage at the load terminal goes positive and/or negative. The circuit also includes means for compensating for the base current of the first and second bipolar transistors.

REFERENCES:
patent: 4220877 (1980-09-01), Giordano
patent: 4319181 (1982-03-01), Wrathall
patent: 4585962 (1986-04-01), Sasayama
patent: 4609832 (1986-09-01), Mehl
patent: 4713560 (1987-12-01), Herndon
patent: 4924344 (1990-05-01), Guajando
patent: 5023493 (1991-06-01), Wrzesinski
patent: 5124580 (1992-06-01), Matthews et al.
patent: 5128562 (1992-07-01), Bunton

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